Audit: legacy firmware against the spec

  1  /* SYNTHETIC EXAMPLE — written for the calgen demo. Not from any real product
  2   * or vendor SDK. Names and values are invented to resemble typical
  3   * power-converter firmware. May not compile on any target. */
  4  
  5  /* protect.c -- fast (per-cycle) and slow (1 ms) protection */
  6  #include "ups_config.h"
  7  #include "sense_scale.h"
  8  
  9  #define FLT_LOG_LEN     16
 10  
 11  enum { FLT_OC = 1, FLT_OL, FLT_UVB, FLT_OVO, FLT_BRN };
 12  
 13  static const float k_trip_a = 15.0f;            /* A rms, overload trip */
 14  static const unsigned short ol_hold_ms = 5000;  /* overload ride-through */
 15  
 16  static unsigned char flt_log[FLT_LOG_LEN];
 17  static unsigned char flt_idx;
 18  static unsigned short ol_ms;
 19  static unsigned char retry;
 20  
 21  extern void inv_off(void);
 22  extern void inv_on(void);
 23  extern void delay_ms(unsigned short ms);
 24  
 25  static void log_fault(unsigned char code)
 26  {
 27      flt_log[flt_idx++ & (FLT_LOG_LEN - 1)] = code;
 28  }
 29  
 30  void prot_fast(float i_pk)
 31  {
 32      float a = (i_pk < 0.0f) ? -i_pk : i_pk;
 33  
 34      if (a > 21.2f) {                       /* peak of the RMS trip level */
 35          inv_off();
 36          log_fault(FLT_OC);
 37      }
 38  }
 39  
 40  void prot_slow(float i_rms, float vbat, float vo_rms)
 41  {
 42      if (i_rms > k_trip_a) {
 43          if (++ol_ms >= ol_hold_ms) { inv_off(); log_fault(FLT_OL); }
 44      } else if (ol_ms) {
 45          ol_ms--;
 46      }
 47      if (vbat < VBAT_CUT)          { inv_off(); log_fault(FLT_UVB); }
 48      if (vo_rms > VO_HI)           { inv_off(); log_fault(FLT_OVO); }
 49      if (vo_rms < 0.9f * VO_NOM)   { log_fault(FLT_BRN); }
 50  }
 51  
 52  void prot_restart(void)
 53  {
 54      if (retry < 3) {
 55          delay_ms(500);
 56          retry++;
 57          inv_on();
 58      }
 59  }

  1  /* SYNTHETIC EXAMPLE — written for the calgen demo. Not from any real product
  2   * or vendor SDK. Names and values are invented to resemble typical
  3   * power-converter firmware. May not compile on any target. */
  4  
  5  /* sense_scale.h -- ADC / comparator scaling for the sense chain */
  6  #ifndef SENSE_SCALE_H
  7  #define SENSE_SCALE_H
  8  
  9  #define ADC_FULL        4095.0f     /* 12-bit converter                   */
 10  #define DAC_FULL        4095        /* comparator reference DAC           */
 11  
 12  /* DC bus: 1.5 M / 10 k divider */
 13  #define VBUS_FS         498.3f      /* V at ADC full scale                */
 14  #define K_VS            (VBUS_FS / ADC_FULL)    /* V per count            */
 15  
 16  /* battery: 499 k / 10 k divider */
 17  #define VBAT_FS         168.0f      /* V at ADC full scale                */
 18  
 19  /* output voltage, mid-rail biased */
 20  #define VO_FS_PK        501.6f      /* peak V at +/- half scale           */
 21  
 22  /* output current: 5 mOhm shunt into x10 amp, mid-rail biased */
 23  #define IO_FS_PK        33.0f       /* peak A at +/- half scale           */
 24  #define CMP_DAC_HI      3364        /* positive overcurrent trip code     */
 25  #define CMP_DAC_LO      (DAC_FULL - CMP_DAC_HI)
 26  
 27  #endif /* SENSE_SCALE_H */

  1  /* SYNTHETIC EXAMPLE — written for the calgen demo. Not from any real product
  2   * or vendor SDK. Names and values are invented to resemble typical
  3   * power-converter firmware. May not compile on any target. */
  4  
  5  /*
  6   * ups_config.h -- 1500 VA on-line UPS, main controller settings
  7   *
  8   * History (hand-maintained):
  9   *   2009-03  first cut, carried over from the 1250 VA export board  (JR)
 10   *   2011-08  domestic 120 V / 60 Hz build                          (MK)
 11   *   2014-02  lithium battery option                                (MK)
 12   *
 13   * NOTE: keep in sync with sense_scale.h if the divider changes.
 14   */
 15  #ifndef UPS_CONFIG_H
 16  #define UPS_CONFIG_H
 17  
 18  /* ---- firmware id ------------------------------------------------------ */
 19  #define FW_VER_MAJ      2
 20  
 21  /* ---- AC input window -------------------------------------------------- */
 22  #define VIN_LO_XFER     85.0f       /* go to battery below this, Vrms     */
 23  #define VIN_HI_XFER     265.0f      /* go to battery above this, Vrms     */
 24  
 25  /* ---- DC bus ----------------------------------------------------------- */
 26  #define VBUS_REF        400.0f      /* PFC regulation target, V           */
 27  
 28  /* ---- inverter / output ------------------------------------------------ */
 29  #define VO_NOM          220.0f      /* output, Vrms                       */
 30  #define VO_TOL          0.03f       /* +/- regulation band                */
 31  #define VO_HI           (VO_NOM * (1.0f + VO_TOL))
 32  #define IO_RATED        12.5f       /* A rms, 1500 VA / 120 V             */
 33  #define I_TRIP_RMS      14.0f       /* overload shutdown, A rms           */
 34  
 35  /* ---- PWM -------------------------------------------------------------- */
 36  #define TMR_LD          6000        /* PWM period, 25 kHz carrier         */
 37  #define DB_CNT          30          /* 300 us dead time                   */
 38  
 39  /* ---- voltage loop (do not touch without power eng sign-off) ----------- */
 40  #define K_P             0.8f
 41  #define K_I             0.015f      /* per control ISR                    */
 42  
 43  /* ---- battery ---------------------------------------------------------- */
 44  #define VBAT_NOM        89.6f       /* string nominal, V                  */
 45  #define VBAT_CUT        78.4f       /* end of discharge, 1.75 V/cell      */
 46  
 47  /* ---- comms / IO ------------------------------------------------------- */
 48  #define UART_BAUD       19200       /* front-panel / RS-232 port          */
 49  #define PIN_BYP_RELAY   12          /* GPIO, static bypass relay drive    */
 50  
 51  #endif /* UPS_CONFIG_H */